Search results

• Frequently Asked Questions
  ===== What does "Global frequency set at 1000000000000 ticks per second" refer to? =====
  16 KB (2,739 words) - 06:28, 5 June 2018
• Running gem5
  Global frequency set at 1000000000000 ticks per second <li>Per-core DVFS</li>
  16 KB (2,431 words) - 10:57, 18 February 2019
• Coding Style
  Indentation will be 4 spaces per level, though namespaces should not increase the indentation.
  11 KB (1,774 words) - 04:46, 13 April 2018
• Parallel M5
  # Create one event queue per thread and one thread per CPU core. Bind logical groups of objects to different EventQueues.
  8 KB (1,262 words) - 12:35, 25 June 2013
• InOrder ToDo List
  *** InstClassSchedule - Vector of schedules per instruction class - load/store, Int execute, FP execute, specialized inst, ** ResourceRequestList - Vector of ResourceRequest (per stage?)
  2 KB (331 words) - 07:57, 19 June 2011
• Python Parameter Types
  | A floating point value specifying bits per second, or a string formatted as [value][unit] where value is a base 10 num * Tbps => terabits per second
  6 KB (946 words) - 17:01, 6 December 2010
• Introduction
  Global frequency set at 1000000000000 ticks per second
  10 KB (1,731 words) - 19:32, 22 May 2015
• Source Code
  ...inputs, reference outputs, and test specific configuration files, arranged per test.
  5 KB (869 words) - 11:30, 15 May 2014
• Build System
  ...ed, which Ruby coherence protocol to use, etc. These [[#Per Configuration|per configuration variables]] are stored in separate files in the build/variabl ...ion is built, the configuration name is also used to determine the default per-configuration variable settings by looking for a matching name in the build
  14 KB (2,257 words) - 10:54, 25 May 2018
• General Memory System
  ...ntially SLICC defines the cache, memory, and dma controllers as individual per-memory-block state machines that together form the overall protocol. By de
  19 KB (3,055 words) - 08:13, 23 July 2018
• Ruby
  ...nsitions and/or pushes the request to the next level of cache hierarchy as per the requirements. Different controller and components of SLICC generated Ru
  11 KB (1,549 words) - 06:31, 5 November 2019
• ISA Parser
  ...that is included in all the generated source files (decoder.cc and all the per-CPU-model execute .cc files). The header output typically contains the C++ #The ''exec output'' contains per-CPU model definitions, i.e., the <code>execute()</code> methods for the ins
  23 KB (3,492 words) - 15:18, 2 February 2012
• Dependencies
  ...lly see significant slowdowns from paging if your system has less than 1GB per core. This constraint is particularly worth noting if you're configuring a
  5 KB (803 words) - 18:10, 4 November 2019
• Interconnection Network
  ...All internal links (between routers) are uni-directional -- this allows a per-direction weight on each link to bias routing decisions.
  7 KB (1,045 words) - 08:56, 7 November 2017
• Garnet2.0
  ...rk. Default is 4. This can also be set from the command line with '''--vcs-per-vnet'''. ** '''buffers_per_data_vc''': number of flit-buffers per VC in the data message class. Since data messages occupy 5 flits, this valu
  13 KB (2,066 words) - 13:07, 10 October 2016
• Coherence-Protocol-Independent Memory Components
  ...r_channel''': Currently the only thing that matters is the number of ranks per channel, i.e. the product of this parameter and '''ranks_per_dimm'''. But ...k). Each bank also has a busy counter. tFAW shift registers are maintained per rank.
  32 KB (5,162 words) - 10:08, 2 April 2019
• Debugging Simulated Code
  Global frequency set at 1000000000000 ticks per second
  6 KB (887 words) - 12:58, 1 December 2014
• Packet Command Attributes
  ...(containing all command types) and src/mem/packet.cc (defining attributes per command type).
  5 KB (429 words) - 11:17, 10 May 2012
• Multiprogrammed workloads
  ...instructions the other threads will have executed. The amount of work done per instruction could change as well if more or less time is spent waiting for ...the previous option but allows tuning the number of instructions executed per thread. It is also not currently supported.
  2 KB (352 words) - 18:56, 10 April 2011
• ARM Kernel
  The repository contains a tag per gem5 kernel releases and working branches for major Linux revisions. Check The repository contains a tag per gem5 kernel release. Check the [https://gem5-review.googlesource.com/#/admi
  6 KB (884 words) - 13:12, 17 January 2018

View (previous 20 | next 20) (20 | 50 | 100 | 250 | 500)